diff -Nrc ecos/packages/ecos.db ecos.ysato/packages/ecos.db *** ecos/packages/ecos.db Sun Jun 2 00:21:32 2002 --- ecos.ysato/packages/ecos.db Sun Jun 2 23:03:43 2002 *************** *** 1451,1456 **** --- 1451,1466 ---- Hitachi SH3 chip." } + package CYGPKG_DEVICES_WATCHDOG_H8300_H8300H { + alias { "Watchdog driver for the Hitachi H8/300H chip" devices_watchdog_h8300h device_watchdog_h8300h } + directory devs/watchdog/h8300/h8300h + script watchdog_h8300h.cdl + hardware + description " + This package provides a watchdog driver implementation for the + Hitachi H8/300H chip." + } + package CYGPKG_IO_WATCHDOG { alias { "Watchdog IO device" watchdog io_watchdog } directory io/watchdog diff -Nrc ecos/packages/devs/watchdog/h8300/h8300h/current/cdl/watchdog_h8300h.cdl ecos.ysato/packages/devs/watchdog/h8300/h8300h/current/cdl/watchdog_h8300h.cdl *** ecos/packages/devs/watchdog/h8300/h8300h/current/cdl/watchdog_h8300h.cdl Thu Jan 1 09:00:00 1970 --- ecos.ysato/packages/devs/watchdog/h8300/h8300h/current/cdl/watchdog_h8300h.cdl Sun Jun 2 19:45:20 2002 *************** *** 0 **** --- 1,102 ---- + # ==================================================================== + # + # watchdog_h8300h.cdl + # + # eCos watchdog for the Hitachi H8/300H driver configuration data + # + # ==================================================================== + #####ECOSGPLCOPYRIGHTBEGIN#### + ## ------------------------------------------- + ## This file is part of eCos, the Embedded Configurable Operating System. + ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. + ## + ## eCos is free software; you can redistribute it and/or modify it under + ## the terms of the GNU General Public License as published by the Free + ## Software Foundation; either version 2 or (at your option) any later version. + ## + ## eCos is distributed in the hope that it will be useful, but WITHOUT ANY + ## WARRANTY; without even the implied warranty of MERCHANTABILITY or + ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + ## for more details. + ## + ## You should have received a copy of the GNU General Public License along + ## with eCos; if not, write to the Free Software Foundation, Inc., + ## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. + ## + ## As a special exception, if other files instantiate templates or use macros + ## or inline functions from this file, or you compile this file and link it + ## with other works to produce a work based on this file, this file does not + ## by itself cause the resulting work to be covered by the GNU General Public + ## License. However the source code for this file must still be made available + ## in accordance with section (3) of the GNU General Public License. + ## + ## This exception does not invalidate any other reasons why a work based on + ## this file might be covered by the GNU General Public License. + ## + ## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. + ## at http://sources.redhat.com/ecos/ecos-license/ + ## ------------------------------------------- + #####ECOSGPLCOPYRIGHTEND#### + # ==================================================================== + ######DESCRIPTIONBEGIN#### + # + # Author(s): ysato + # Contributors: ysato + # Date: 2002-04-29 + # + #####DESCRIPTIONEND#### + # + # ==================================================================== + + cdl_package CYGPKG_DEVICES_WATCHDOG_H8300_H8300H { + parent CYGPKG_IO_WATCHDOG + active_if CYGPKG_IO_WATCHDOG + display "H8/300H watchdog driver" + requires CYGPKG_HAL_H8300_H8300H + requires CYGPKG_KERNEL + hardware + compile watchdog_h8300h.cxx + implements CYGINT_WATCHDOG_HW_IMPLEMENTATIONS + implements CYGINT_WATCHDOG_RESETS_ON_TIMEOUT + active_if CYGIMP_WATCHDOG_HARDWARE + + cdl_option CYGIMP_WATCHDOG_HARDWARE { + parent CYGPKG_IO_WATCHDOG_IMPLEMENTATION + display "Hardware watchdog" + default_value 1 + implements CYGINT_WATCHDOG_IMPLEMENTATIONS + } + + cdl_component CYGPKG_DEVICES_WATCHDOG_H8300_H8300H_OPTIONS { + display "H8/300H watchdog build options" + flavor none + description " + Package specific build options including control over + compiler flags used only in building this package, + and details of which tests are built." + + + cdl_option CYGPKG_DEVICES_WATCHDOG_H8300_H8300H_CFLAGS_ADD { + display "Additional compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building the watchdog device. These flags are used in addition + to the set of global flags." + } + + cdl_option CYGPKG_DEVICES_WATCHDOG_H8300_H8300H_CFLAGS_REMOVE { + display "Suppressed compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building the watchdog device. These flags are removed from + the set of global flags if present." + } + + } + } diff -Nrc ecos/packages/devs/watchdog/h8300/h8300h/current/src/watchdog_h8300h.cxx ecos.ysato/packages/devs/watchdog/h8300/h8300h/current/src/watchdog_h8300h.cxx *** ecos/packages/devs/watchdog/h8300/h8300h/current/src/watchdog_h8300h.cxx Thu Jan 1 09:00:00 1970 --- ecos.ysato/packages/devs/watchdog/h8300/h8300h/current/src/watchdog_h8300h.cxx Sun Jun 2 19:43:11 2002 *************** *** 0 **** --- 1,115 ---- + //========================================================================== + // + // devs/watchdog/h8300/h83000/watchdog_h8300.cxx + // + // Watchdog implementation for Hitachi H8/300H CPUs + // + //========================================================================== + //####ECOSGPLCOPYRIGHTBEGIN#### + // ------------------------------------------- + // This file is part of eCos, the Embedded Configurable Operating System. + // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. + // + // eCos is free software; you can redistribute it and/or modify it under + // the terms of the GNU General Public License as published by the Free + // Software Foundation; either version 2 or (at your option) any later version. + // + // eCos is distributed in the hope that it will be useful, but WITHOUT ANY + // WARRANTY; without even the implied warranty of MERCHANTABILITY or + // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + // for more details. + // + // You should have received a copy of the GNU General Public License along + // with eCos; if not, write to the Free Software Foundation, Inc., + // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. + // + // As a special exception, if other files instantiate templates or use macros + // or inline functions from this file, or you compile this file and link it + // with other works to produce a work based on this file, this file does not + // by itself cause the resulting work to be covered by the GNU General Public + // License. However the source code for this file must still be made available + // in accordance with section (3) of the GNU General Public License. + // + // This exception does not invalidate any other reasons why a work based on + // this file might be covered by the GNU General Public License. + // + // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. + // at http://sources.redhat.com/ecos/ecos-license/ + // ------------------------------------------- + //####ECOSGPLCOPYRIGHTEND#### + //========================================================================== + //#####DESCRIPTIONBEGIN#### + // + // Author(s): yoshinori sato + // Contributors: yoshinori sato + // Date: 2002-04-29 + // Purpose: Watchdog class implementation + // Description: Contains an implementation of the Watchdog class for use + // with the Hitachi H8/300H watchdog timer. + // + //####DESCRIPTIONEND#### + // + //========================================================================== + + #include // system configuration file + #include // configuration for this package + #include // kernel config + + #include // tracing macros + #include // instrumentation + + #include // IO register access + #include // watchdog register definitions + + #include // watchdog API + + // ------------------------------------------------------------------------- + // Constructor + + void + Cyg_Watchdog::init_hw(void) + { + CYG_REPORT_FUNCTION(); + + // No hardware init needed. + + resolution = CYGARC_WDT_PERIOD; + + CYG_REPORT_RETURN(); + } + + // ------------------------------------------------------------------------- + // Start the watchdog running. + + void + Cyg_Watchdog::start() + { + CYG_REPORT_FUNCTION(); + + //Stop WDT + HAL_WRITE_UINT16(CYGARC_TCSR,CYGARC_TCSR_MAGIC); + //Clear WDT Count + HAL_WRITE_UINT16(CYGARC_TCSR,CYGARC_TCNT_MAGIC); + //Start WDT + HAL_WRITE_UINT16(CYGARC_TCSR,CYGARC_TCSR_MAGIC| + CYGARC_WDT_WT|CYGARC_WDT_TME|CYGARC_WDT_CKS); + + CYG_REPORT_RETURN(); + } + + // ------------------------------------------------------------------------- + // Reset watchdog timer. This needs to be called regularly to prevent + // the watchdog firing. + + void + Cyg_Watchdog::reset() + { + CYG_REPORT_FUNCTION(); + + HAL_WRITE_UINT16(CYGARC_TCSR,CYGARC_TCNT_MAGIC); + + CYG_REPORT_RETURN(); + } + + // ------------------------------------------------------------------------- + // EOF watchdog_h8300.cxx diff -Nrc ecos/packages/hal/h8300/aki3068net/current/cdl/hal_h8300_h8300h_aki3068net.cdl ecos.ysato/packages/hal/h8300/aki3068net/current/cdl/hal_h8300_h8300h_aki3068net.cdl *** ecos/packages/hal/h8300/aki3068net/current/cdl/hal_h8300_h8300h_aki3068net.cdl Sun Jun 2 01:57:07 2002 --- ecos.ysato/packages/hal/h8300/aki3068net/current/cdl/hal_h8300_h8300h_aki3068net.cdl Sun Jun 2 00:24:57 2002 *************** *** 40,49 **** # ==================================================================== ######DESCRIPTIONBEGIN#### # ! # Author(s): jskov # Original data: bartv ! # Contributors: ! # Date: 1999-11-02 # #####DESCRIPTIONEND#### # --- 40,49 ---- # ==================================================================== ######DESCRIPTIONBEGIN#### # ! # Author(s): yoshinori sato # Original data: bartv ! # Contributors: yoshinori sato ! # Date: 2002-04-10 # #####DESCRIPTIONEND#### # *************** *** 197,207 **** display "Global linker flags" flavor data no_define ! default_value { "-g -nostdlib -Wl,--gc-sections -Wl,-static -mh" } description " This option controls the global linker flags. Individual packages may define options which override these global flags." } } cdl_component CYGHWR_MEMORY_LAYOUT { --- 197,228 ---- display "Global linker flags" flavor data no_define ! default_value { "-g -nostdlib -Wl,--gc-sections -Wl,-static -mh -mint32" } description " This option controls the global linker flags. Individual packages may define options which override these global flags." } + cdl_option CYGBLD_BUILD_GDB_STUBS { + display "Build GDB stub ROM image" + default_value 0 + requires CYGSEM_HAL_ROM_MONITOR + requires CYGBLD_BUILD_COMMON_GDB_STUBS + requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT + no_define + description " + This option enables the building of the GDB stubs for the + board. The common HAL controls takes care of most of the + build process, but the final conversion from ELF image to + binary data is handled by the platform CDL, allowing + relocation of the data if necessary." + + make -priority 320 { + /bin/gdb_module.bin : /bin/gdb_module.img + $(OBJCOPY) -O binary $< $@ + } + } } cdl_component CYGHWR_MEMORY_LAYOUT { *************** *** 242,245 **** --- 263,274 ---- application. This enables features such as utilizing a separate interrupt stack when exceptions are generated." } + cdl_option CYGSEM_HAL_H8300_VECTOR_HOOK { + display "Interrupt Vector Hook" + flavor bool + default_value 1 + parent CYGPKG_HAL_ROM_MONITOR + description " + Interrupt Vector Table Hooking Support" + } } diff -Nrc ecos/packages/hal/h8300/aki3068net/current/include/pkgconf/mlt_h8300_h8300h_aki3068net_ram.ldi ecos.ysato/packages/hal/h8300/aki3068net/current/include/pkgconf/mlt_h8300_h8300h_aki3068net_ram.ldi *** ecos/packages/hal/h8300/aki3068net/current/include/pkgconf/mlt_h8300_h8300h_aki3068net_ram.ldi Tue May 21 07:22:38 2002 --- ecos.ysato/packages/hal/h8300/aki3068net/current/include/pkgconf/mlt_h8300_h8300h_aki3068net_ram.ldi Sun Jun 2 00:28:48 2002 *************** *** 10,15 **** --- 10,16 ---- MEMORY { ram : ORIGIN = 0x400000, LENGTH = 0x20000 + iram : ORIGIN = 0xffbf20, LENGTH = 0x100 } SECTIONS *************** *** 21,30 **** SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) - SECTION_int_fook_table (ram, ALIGN (0x4), LMA_EQ_VMA) SECTION_data (ram, ALIGN (0x4),LMA_EQ_VMA) SECTION_bss (ram, ALIGN (0x4),LMA_EQ_VMA) SECTIONS_END } - - fook_table_address = 0xffbf20; --- 22,29 ---- SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_data (ram, ALIGN (0x4),LMA_EQ_VMA) SECTION_bss (ram, ALIGN (0x4),LMA_EQ_VMA) + SECTION_int_hook_table (iram, 0xffbf20, FOLLOWING (.data)) SECTIONS_END } diff -Nrc ecos/packages/hal/h8300/aki3068net/current/include/pkgconf/mlt_h8300_h8300h_aki3068net_ram.mlt ecos.ysato/packages/hal/h8300/aki3068net/current/include/pkgconf/mlt_h8300_h8300h_aki3068net_ram.mlt *** ecos/packages/hal/h8300/aki3068net/current/include/pkgconf/mlt_h8300_h8300h_aki3068net_ram.mlt Tue May 21 07:22:38 2002 --- ecos.ysato/packages/hal/h8300/aki3068net/current/include/pkgconf/mlt_h8300_h8300h_aki3068net_ram.mlt Sun Jun 2 00:28:48 2002 *************** *** 5,12 **** section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! ! section gcc_except_table 0 1 0 1 0 1 0 1 int_fook_table int_fook_table ! ! section int_fook_table 0 1 0 1 0 1 0 1 data data ! section data 0 4 0 1 0 1 0 1 bss bss ! section bss 0 4 0 1 0 1 0 0 ! --- 5,12 ---- section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! ! section gcc_except_table 0 1 0 1 0 1 0 1 int_hook_table int_hook_table ! ! section int_hook_table 0 1 0 1 0 1 0 1 data data ! section data 0 4 0 1 0 1 0 1 bss bss ! section bss 0 4 0 1 0 1 0 0 ! diff -Nrc ecos/packages/hal/h8300/aki3068net/current/include/pkgconf/mlt_h8300_h8300h_aki3068net_rom.ldi ecos.ysato/packages/hal/h8300/aki3068net/current/include/pkgconf/mlt_h8300_h8300h_aki3068net_rom.ldi *** ecos/packages/hal/h8300/aki3068net/current/include/pkgconf/mlt_h8300_h8300h_aki3068net_rom.ldi Tue May 21 07:22:38 2002 --- ecos.ysato/packages/hal/h8300/aki3068net/current/include/pkgconf/mlt_h8300_h8300h_aki3068net_rom.ldi Sun Jun 2 00:28:48 2002 *************** *** 3,8 **** --- 3,9 ---- // This is a generated file - do not edit #include + #include OUTPUT_FORMAT("elf32-h8300") OUTPUT_ARCH(h8300h) *************** *** 28,41 **** SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) #if !defined(CYGPKG_IO_ETH_DRIVERS) ! SECTION_int_fook_table (ram, 0xffbf20,FOLLOWING (.gcc_except_table)) ! SECTION_data (ram, ALIGN (0x4),FOLLOWING (.int_fook_table)) SECTION_bss (ram, ALIGN (0x4),LMA_EQ_VMA) #else ! SECTION_data (ram, 0x5F4000,FOLLOWING (.gcc_except_table)) SECTION_bss (ram, ALIGN (0x4),LMA_EQ_VMA) - SECTION_int_fook_table (iram, 0xffbf20,FOLLOWING (.data)) #endif SECTIONS_END } --- 29,48 ---- SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + #if !defined(CYGSEM_HAL_H8300_VECTOR_HOOK) + SECTION_int_hook_table (rom, ALIGN (0x1), LMA_EQ_VMA) + #else + SECTION_int_hook_table (iram, 0xffbf20,FOLLOWING (.gcc_except_table)) + #endif #if !defined(CYGPKG_IO_ETH_DRIVERS) ! #if defined(CYGSEM_HAL_H8300_VECTOR_HOOK) ! SECTION_int_hook_table (ram, 0xffbf20,FOLLOWING(.gcc_except_table)) ! #endif ! SECTION_data (ram, ALIGN (0x4),FOLLOWING (.int_hook_table)) SECTION_bss (ram, ALIGN (0x4),LMA_EQ_VMA) #else ! SECTION_data (ram, 0x5F4000,FOLLOWING (.int_hook_table)) SECTION_bss (ram, ALIGN (0x4),LMA_EQ_VMA) #endif SECTIONS_END } diff -Nrc ecos/packages/hal/h8300/aki3068net/current/include/platform.inc ecos.ysato/packages/hal/h8300/aki3068net/current/include/platform.inc *** ecos/packages/hal/h8300/aki3068net/current/include/platform.inc Sun Jun 2 01:57:07 2002 --- ecos.ysato/packages/hal/h8300/aki3068net/current/include/platform.inc Sun Jun 2 00:26:33 2002 *************** *** 69,75 **** .macro hal_memc_init #if defined(CYG_HAL_STARTUP_ROM) mov.l #init_regs,er0 ! mov.w #8,e1 1: mov.l @er0+,er2 mov.w @er0+,r1 --- 69,75 ---- .macro hal_memc_init #if defined(CYG_HAL_STARTUP_ROM) mov.l #init_regs,er0 ! mov.w #9,e1 1: mov.l @er0+,er2 mov.w @er0+,r1 *************** *** 80,92 **** init_regs: .long CYGARC_RTCOR ! .word 5 ; 1.5[ms] reflesh cycle .long CYGARC_RTMCSR ! .word 0x30 ; clk x 2048 .long CYGARC_DRCRB ! .word 0x90 .long CYGARC_DRCRA ! .word 0x22 .long CYGARC_P1DDR .word 0xff .long CYGARC_P2DDR --- 80,94 ---- init_regs: .long CYGARC_RTCOR ! .word 99 .long CYGARC_RTMCSR ! .word 0x0f .long CYGARC_DRCRB ! .word 0x98 .long CYGARC_DRCRA ! .word 0x3c ! .long CYGARC_ASTCR ! .word 0xfb .long CYGARC_P1DDR .word 0xff .long CYGARC_P2DDR diff -Nrc ecos/packages/hal/h8300/aki3068net/current/include/plf_intr.h ecos.ysato/packages/hal/h8300/aki3068net/current/include/plf_intr.h *** ecos/packages/hal/h8300/aki3068net/current/include/plf_intr.h Sun Jun 2 01:57:07 2002 --- ecos.ysato/packages/hal/h8300/aki3068net/current/include/plf_intr.h Sun Jun 2 00:26:33 2002 *************** *** 44,50 **** //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour ! // Contributors: jlarmour // Date: 1999-09-09 // Purpose: Define Interrupt support // Description: The macros defined here provide the HAL APIs for handling --- 44,50 ---- //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour ! // Contributors: jlarmour, ysato // Date: 1999-09-09 // Purpose: Define Interrupt support // Description: The macros defined here provide the HAL APIs for handling diff -Nrc ecos/packages/hal/h8300/aki3068net/current/src/hal_diag.c ecos.ysato/packages/hal/h8300/aki3068net/current/src/hal_diag.c *** ecos/packages/hal/h8300/aki3068net/current/src/hal_diag.c Sun Jun 2 01:57:07 2002 --- ecos.ysato/packages/hal/h8300/aki3068net/current/src/hal_diag.c Sun Jun 2 00:26:33 2002 *************** *** 60,66 **** #define SCI_BASE ((cyg_uint8*)0xffffb8) ! static channel_data_t channel = { (cyg_uint8*)SCI_BASE, 0, 0}; void cyg_hal_plf_comms_init(void) --- 60,66 ---- #define SCI_BASE ((cyg_uint8*)0xffffb8) ! const static channel_data_t channel = { (cyg_uint8*)SCI_BASE, 0, 0}; void cyg_hal_plf_comms_init(void) diff -Nrc ecos/packages/hal/h8300/aki3068net/current/src/plf_misc.c ecos.ysato/packages/hal/h8300/aki3068net/current/src/plf_misc.c *** ecos/packages/hal/h8300/aki3068net/current/src/plf_misc.c Sun Jun 2 01:57:07 2002 --- ecos.ysato/packages/hal/h8300/aki3068net/current/src/plf_misc.c Sun Jun 2 20:18:23 2002 *************** *** 84,90 **** #endif /*------------------------------------------------------------------------*/ ! /* clock support */ void hal_clock_initialize(cyg_uint32 period) { --- 84,90 ---- #endif /*------------------------------------------------------------------------*/ ! /* clock support */ void hal_clock_initialize(cyg_uint32 period) { *************** *** 122,161 **** *pvalue = val; } - //--------------------------------------------------------------------------- - // Low-level delay (in microseconds) - - #if 0 - void hal_delay_us(int usecs) - { - volatile CYG_BYTE *tcr = (CYG_BYTE *)CYGARC_8TCR2; - volatile CYG_BYTE *tcnt = (CYG_BYTE *)CYGARC_8TCNT2; - short clocks_per_us = (CYGHWR_HAL_H8300_PROCESSOR_SPEED/1000000)/8*25; - //short clocks_per_us = (CYGHWR_HAL_H8300_PROCESSOR_SPEED/1000000)/20; - unsigned char val1,val2; - short diff; - - usecs /= 25; - - *tcnt = 0x00; - *tcr = 0x01; - - diff = 0; - while (usecs > 0) { - while (diff < clocks_per_us) { - val1 = *tcnt; - while ((val2 = *tcnt) == val1); - if (val2 < val1) - diff += val2 + 0x100 - val1; - else - diff += val2 - val1; - } - usecs -= diff / clocks_per_us; - diff -= clocks_per_us; - } - *tcr = 0x00; - } - #endif - /*------------------------------------------------------------------------*/ /* End of plf_misc.c */ --- 122,126 ---- diff -Nrc ecos/packages/hal/h8300/arch/current/cdl/hal_h8300.cdl ecos.ysato/packages/hal/h8300/arch/current/cdl/hal_h8300.cdl *** ecos/packages/hal/h8300/arch/current/cdl/hal_h8300.cdl Sun Jun 2 01:57:07 2002 --- ecos.ysato/packages/hal/h8300/arch/current/cdl/hal_h8300.cdl Sun Jun 2 00:26:33 2002 *************** *** 40,49 **** # ==================================================================== ######DESCRIPTIONBEGIN#### # ! # Author(s): jskov # Original data: bartv, nickg ! # Contributors: dmoseley ! # Date: 1999-11-02 # #####DESCRIPTIONEND#### # --- 40,49 ---- # ==================================================================== ######DESCRIPTIONBEGIN#### # ! # Author(s): yoshinori sato # Original data: bartv, nickg ! # Contributors: yoshinori sato ! # Date: 2002-02-16 # #####DESCRIPTIONEND#### # *************** *** 86,89 **** --- 86,132 ---- @echo >> $(notdir $@).deps @rm vectors.tmp } + cdl_component CYGPKG_REDBOOT_H8300_OPTIONS { + display "Redboot for H8/300 options" + flavor none + no_define + parent CYGPKG_REDBOOT + active_if CYGPKG_REDBOOT + description " + This option lists the target's requirements for a valid Redboot + configuration." + + cdl_component CYGSEM_REDBOOT_H8300_LINUX_BOOT { + display "Support booting uCinux via RedBoot" + flavor bool + default_value 1 + description " + This option enables RedBoot to support booting of a uClinux kernel." + compile -library=libextras.a redboot_linux_exec.c + + cdl_option CYGDAT_REDBOOT_H8300_LINUX_BOOT_ENTRY { + display "Default kernel entry address" + flavor data + default_value 0x400000 + description " + This option uClinux kernel entry address of default." + } + + cdl_option CYGDAT_REDBOOT_H8300_LINUX_COMMAND_START { + display "Default kernel command line start address" + flavor data + default_value 0x5ffe00 + description " + This option uClinux kernel command line start address of default." + } + + cdl_option CYGDAT_REDBOOT_H8300_LINUX_BOOT_COMMAND_LINE { + display "Default command line" + flavor data + default_value { "console=/dev/ttyS1" } + description " + This option uClinux kernel startup command line of default." + } + } + } } diff -Nrc ecos/packages/hal/h8300/arch/current/include/basetype.h ecos.ysato/packages/hal/h8300/arch/current/include/basetype.h *** ecos/packages/hal/h8300/arch/current/include/basetype.h Sun Jun 2 01:57:07 2002 --- ecos.ysato/packages/hal/h8300/arch/current/include/basetype.h Sun Jun 2 00:26:33 2002 *************** *** 45,51 **** // // Author(s): yoshinori sato // Contributors: yoshinori sato ! // Date: 1997-09-08 // Purpose: Define architecture base types. // Usage: Included by "cyg_type.h", do not use directly // --- 45,51 ---- // // Author(s): yoshinori sato // Contributors: yoshinori sato ! // Date: 2002-02-14 // Purpose: Define architecture base types. // Usage: Included by "cyg_type.h", do not use directly // diff -Nrc ecos/packages/hal/h8300/arch/current/include/h8300_stub.h ecos.ysato/packages/hal/h8300/arch/current/include/h8300_stub.h *** ecos/packages/hal/h8300/arch/current/include/h8300_stub.h Sun Jun 2 01:57:07 2002 --- ecos.ysato/packages/hal/h8300/arch/current/include/h8300_stub.h Sun Jun 2 00:26:33 2002 *************** *** 57,63 **** extern "C" { #endif ! #define NUMREGS 32 #define REGSIZE( _x_ ) (4) --- 57,65 ---- extern "C" { #endif ! #define NUMREGS 10 ! ! #define NUMREGBYTES (4*10) #define REGSIZE( _x_ ) (4) *************** *** 65,71 **** enum regnames { ER0,ER1,ER2,ER3,ER4,ER5,ER6, ! SP, PC, CCR }; typedef enum regnames regnames_t; --- 67,73 ---- enum regnames { ER0,ER1,ER2,ER3,ER4,ER5,ER6, ! SP, CCR,PC }; typedef enum regnames regnames_t; diff -Nrc ecos/packages/hal/h8300/arch/current/include/hal_arch.h ecos.ysato/packages/hal/h8300/arch/current/include/hal_arch.h *** ecos/packages/hal/h8300/arch/current/include/hal_arch.h Sun Jun 2 01:57:07 2002 --- ecos.ysato/packages/hal/h8300/arch/current/include/hal_arch.h Sun Jun 2 00:26:33 2002 *************** *** 102,108 **** _regs_->er4 = (_id_)|0xddd4; \ _regs_->er5 = (_id_)|0xddd5; \ _regs_->er6 = (_id_)|0xddd6; \ - _regs_->ccr = 0x00; \ _regs_->pc = (CYG_WORD)(_entry_); \ _sp_ = (CYG_ADDRESS)_regs_; \ } --- 102,107 ---- *************** *** 146,152 **** "trapa #3" \ ); ! #define HAL_BREAKINST 0x5703 #define HAL_BREAKINST_SIZE 2 --- 145,151 ---- "trapa #3" \ ); ! #define HAL_BREAKINST 0x5730 #define HAL_BREAKINST_SIZE 2 *************** *** 180,189 **** _regval_[5] = (_regs_)->er5; \ _regval_[6] = (_regs_)->er6; \ \ ! _regval_[7] = (CYG_ADDRWORD)(_regs_) + \ ! sizeof(HAL_SavedRegisters); \ ! _regval_[8] = (_regs_)->pc; \ ! _regval_[9] = (_regs_)->ccr; \ \ HAL_GET_GDB_EXTRA_REGISTERS( _regval_, _regs_ ); \ } --- 179,187 ---- _regval_[5] = (_regs_)->er5; \ _regval_[6] = (_regs_)->er6; \ \ ! _regval_[7] = (_regs_)->sp; \ ! _regval_[8] = (_regs_)->pc >> 24; \ ! _regval_[9] = (_regs_)->pc & 0xffffff; \ \ HAL_GET_GDB_EXTRA_REGISTERS( _regval_, _regs_ ); \ } *************** *** 201,208 **** (_regs_)->er5 = _regval_[5]; \ (_regs_)->er6 = _regval_[6]; \ \ ! (_regs_)->pc = _regval_[8]; \ ! (_regs_)->ccr = _regval_[9]; \ \ /* We do not allow the SP or PSW to be set. Changing the SP will \ * mess up the saved state. No PSW is saved on thread context \ --- 199,206 ---- (_regs_)->er5 = _regval_[5]; \ (_regs_)->er6 = _regval_[6]; \ \ ! (_regs_)->pc = (_regval_[8] & 0x7f) << 24 | \ ! (_regval_[9] & 0xffffff); \ \ /* We do not allow the SP or PSW to be set. Changing the SP will \ * mess up the saved state. No PSW is saved on thread context \ *************** *** 212,217 **** --- 210,219 ---- HAL_SET_GDB_EXTRA_REGISTERS( _regs_, _regval_ ); \ } + #ifndef CYGARC_HAL_GET_PC_REG + #define CYGARC_HAL_GET_PC_REG(_regs_,_val_) ((_val_) = (_regs_)->pc & 0xffffff) + #endif + //------------------------------------------------------------------------- // HAL setjmp // Note: These definitions are repeated in context.S. If changes are required diff -Nrc ecos/packages/hal/h8300/arch/current/src/context.S ecos.ysato/packages/hal/h8300/arch/current/src/context.S *** ecos/packages/hal/h8300/arch/current/src/context.S Sun Jun 2 01:57:07 2002 --- ecos.ysato/packages/hal/h8300/arch/current/src/context.S Sun Jun 2 00:26:33 2002 *************** *** 68,73 **** --- 68,75 ---- .global CYG_LABEL_DEFN(hal_thread_switch_context) CYG_LABEL_DEFN(hal_thread_switch_context): hal_cpu_save_all + stc ccr,r2l + mov.b r2l,@(4*8,sp) mov.l sp,@er1 # Now load the destination thread by dropping through *************** *** 85,91 **** mov.l @er0,sp hal_cpu_load_all ! rts ##----------------------------------------------------------------------------- ## HAL longjmp(), setjmp() implementations --- 87,93 ---- mov.l @er0,sp hal_cpu_load_all ! rte ##----------------------------------------------------------------------------- ## HAL longjmp(), setjmp() implementations diff -Nrc ecos/packages/hal/h8300/arch/current/src/h8300_stub.c ecos.ysato/packages/hal/h8300/arch/current/src/h8300_stub.c *** ecos/packages/hal/h8300/arch/current/src/h8300_stub.c Sun Jun 2 01:57:07 2002 --- ecos.ysato/packages/hal/h8300/arch/current/src/h8300_stub.c Sun Jun 2 00:26:33 2002 *************** *** 133,139 **** #define NUM_SS_BPTS 2 static target_register_t break_mem [NUM_SS_BPTS] = {0, 0}; ! static unsigned char break_mem_data [NUM_SS_BPTS]; /* Set a single-step breakpoint at ADDR. Up to two such breakpoints can be set; WHICH specifies which one to set (0 or 1). */ --- 133,139 ---- #define NUM_SS_BPTS 2 static target_register_t break_mem [NUM_SS_BPTS] = {0, 0}; ! static unsigned short break_mem_data [NUM_SS_BPTS]; /* Set a single-step breakpoint at ADDR. Up to two such breakpoints can be set; WHICH specifies which one to set (0 or 1). */ *************** *** 155,161 **** int x; for (x = 0; x < NUM_SS_BPTS; x++) { ! unsigned char* addr = (unsigned char*) break_mem[x]; if (addr) { *addr = break_mem_data[x]; break_mem[x] = 0; --- 155,161 ---- int x; for (x = 0; x < NUM_SS_BPTS; x++) { ! unsigned short* addr = (unsigned short *)break_mem[x]; if (addr) { *addr = break_mem_data[x]; break_mem[x] = 0; *************** *** 219,225 **** /* rts */ unsigned long *sp; sp = (unsigned long *)get_register(SP); ! next = *sp & 0x00ffffff; } else if ((opcode & 0xfb00) != 0x5800) { /* jmp / jsr */ int regs; --- 219,235 ---- /* rts */ unsigned long *sp; sp = (unsigned long *)get_register(SP); ! next = *(sp+1) & 0x00ffffff; ! } else if (((opcode & 0xf000) == 0x4000) || ((opcode & 0xff00) == 0x5500)) { ! /* b**:8 */ ! char dsp; ! dsp = (opcode & 0xff); ! set_single_bp(1,(unsigned char *)(pc+2+dsp)); ! } else if (((opcode & 0xff00) == 0x5800) || ((opcode & 0xff00) == 0x5c00)) { ! /* b**:16 */ ! short dsp; ! dsp = *(short *)(pc+2); ! set_single_bp(1,(unsigned char *)(pc+4+dsp)); } else if ((opcode & 0xfb00) != 0x5800) { /* jmp / jsr */ int regs; *************** *** 230,251 **** next = get_register(reg_tbl[regs]); break; case 0x5a00: ! next = *(unsigned long *)(pc+2) & 0x00ffffff; break; case 0x5b00: next = *(unsigned long *)(opcode & 0xff); break; } - } else if (((opcode & 0xf000) == 0x4000) || ((opcode & 0xff00) == 0x5500)) { - /* b**:8 */ - unsigned long dsp; - dsp = (long)(opcode && 0xff)+pc+2; - set_single_bp(1,(unsigned char *)dsp); - } else if (((opcode & 0xff00) == 0x5800) || ((opcode & 0xff00) == 0x5c00)) { - /* b**:16 */ - unsigned long dsp; - dsp = *(unsigned short *)(pc+2)+pc+4; - set_single_bp(1,(unsigned char *)dsp); } set_single_bp(0,(unsigned char *)next); } --- 240,251 ---- next = get_register(reg_tbl[regs]); break; case 0x5a00: ! next = *(unsigned long *)(pc) & 0x00ffffff; break; case 0x5b00: next = *(unsigned long *)(opcode & 0xff); break; } } set_single_bp(0,(unsigned char *)next); } diff -Nrc ecos/packages/hal/h8300/arch/current/src/hal_misc.c ecos.ysato/packages/hal/h8300/arch/current/src/hal_misc.c *** ecos/packages/hal/h8300/arch/current/src/hal_misc.c Sun Jun 2 01:57:07 2002 --- ecos.ysato/packages/hal/h8300/arch/current/src/hal_misc.c Sun Jun 2 00:26:33 2002 *************** *** 57,62 **** --- 57,63 ---- #include #include + #include #include diff -Nrc ecos/packages/hal/h8300/arch/current/src/hal_syscall.c ecos.ysato/packages/hal/h8300/arch/current/src/hal_syscall.c *** ecos/packages/hal/h8300/arch/current/src/hal_syscall.c Sun Jun 2 01:57:07 2002 --- ecos.ysato/packages/hal/h8300/arch/current/src/hal_syscall.c Sun Jun 2 00:26:33 2002 *************** *** 41,47 **** //#####DESCRIPTIONBEGIN#### // // Author(s): msalter ! // Contributors:msalter // Date: 2000-11-5 // Purpose: // Description: --- 41,47 ---- //#####DESCRIPTIONBEGIN#### // // Author(s): msalter ! // Contributors:msalter, Yoshinori Sato // Date: 2000-11-5 // Purpose: // Description: *************** *** 101,107 **** } if (__do_syscall(func, arg1, arg2, arg3, arg4, &err)) { ! put_register(D0, err); return 0; } --- 101,107 ---- } if (__do_syscall(func, arg1, arg2, arg3, arg4, &err)) { ! put_register(ER0, err); return 0; } diff -Nrc ecos/packages/hal/h8300/arch/current/src/redboot_linux_exec.c ecos.ysato/packages/hal/h8300/arch/current/src/redboot_linux_exec.c *** ecos/packages/hal/h8300/arch/current/src/redboot_linux_exec.c Thu Jan 1 09:00:00 1970 --- ecos.ysato/packages/hal/h8300/arch/current/src/redboot_linux_exec.c Sun Jun 2 00:26:33 2002 *************** *** 0 **** --- 1,107 ---- + //========================================================================== + // + // redboot_linux_exec.c + // + // RedBoot exec command for Linux booting + // + //========================================================================== + //####ECOSGPLCOPYRIGHTBEGIN#### + // ------------------------------------------- + // This file is part of eCos, the Embedded Configurable Operating System. + // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. + // + // eCos is free software; you can redistribute it and/or modify it under + // the terms of the GNU General Public License as published by the Free + // Software Foundation; either version 2 or (at your option) any later version. + // + // eCos is distributed in the hope that it will be useful, but WITHOUT ANY + // WARRANTY; without even the implied warranty of MERCHANTABILITY or + // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + // for more details. + // + // You should have received a copy of the GNU General Public License along + // with eCos; if not, write to the Free Software Foundation, Inc., + // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. + // + // As a special exception, if other files instantiate templates or use macros + // or inline functions from this file, or you compile this file and link it + // with other works to produce a work based on this file, this file does not + // by itself cause the resulting work to be covered by the GNU General Public + // License. However the source code for this file must still be made available + // in accordance with section (3) of the GNU General Public License. + // + // This exception does not invalidate any other reasons why a work based on + // this file might be covered by the GNU General Public License. + // + // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. + // at http://sources.redhat.com/ecos/ecos-license/ + // ------------------------------------------- + //####ECOSGPLCOPYRIGHTEND#### + //========================================================================== + //#####DESCRIPTIONBEGIN#### + // + // Author(s): yoshinori sato + // Contributors: yoshinori sato + // Date: 2002-05-28 + // Purpose: RedBoot exec command for uClinux booting + // + //####DESCRIPTIONEND#### + // + //=========================================================================== + + #include + + #include + #include + #include + + #define xstr(s) str(s) + #define str(s...) #s + + static void do_exec(int argc, char *argv[]); + RedBoot_cmd("exec", + "Execute an image", + "[-b ] [-c \"kernel command line\"]\n" + " []", + do_exec + ); + + static void + do_exec(int argc, char *argv[]) + { + cyg_uint32 entry = CYGDAT_REDBOOT_H8300_LINUX_BOOT_ENTRY; + cyg_uint32 command_addr = CYGDAT_REDBOOT_H8300_LINUX_COMMAND_START; + char *cmd_line = xstr( CYGDAT_REDBOOT_H8300_LINUX_BOOT_COMMAND_LINE ); + + bool command_addr_set,command_line_set; + + struct option_info opts[2]; + char *pcmd; + int oldints; + + init_opts(&opts[0], 'b', true, OPTION_ARG_TYPE_NUM, + (void **)&command_addr, &command_addr_set, "command line address"); + init_opts(&opts[1], 'c', true, OPTION_ARG_TYPE_STR, + (void **)&cmd_line, &command_line_set, "kernel command line"); + + if (!scan_opts(argc, argv, 1, opts, 2, (void *)&entry, + OPTION_ARG_TYPE_NUM, "entry address")) + return ; + + diag_printf("Now booting linux kernel:\n"); + diag_printf(" Entry Address 0x%08x\n", entry); + diag_printf(" Cmdline : %s\n", cmd_line); + + HAL_DISABLE_INTERRUPTS(oldints); + HAL_DCACHE_SYNC(); + HAL_ICACHE_DISABLE(); + HAL_DCACHE_DISABLE(); + HAL_DCACHE_SYNC(); + HAL_ICACHE_INVALIDATE_ALL(); + HAL_DCACHE_INVALIDATE_ALL(); + + pcmd = (char *)command_addr; + while ((*pcmd++ = *cmd_line++)); + + asm ("jmp @%0" : : "r" (entry)); + } diff -Nrc ecos/packages/hal/h8300/arch/current/src/vectors.S ecos.ysato/packages/hal/h8300/arch/current/src/vectors.S *** ecos/packages/hal/h8300/arch/current/src/vectors.S Sun Jun 2 01:57:07 2002 --- ecos.ysato/packages/hal/h8300/arch/current/src/vectors.S Sun Jun 2 00:26:33 2002 *************** *** 90,100 **** ; Copy the exception frame mov.l #__cygmon_interrupt_stack,er0 mov.l @sp,er1 - mov.l er1,@-er0 ; Save the pre-exception sp in the register image mov.l sp,@-er0 ! ; Actually switch the stack mov.l er0,sp --- 90,99 ---- ; Copy the exception frame mov.l #__cygmon_interrupt_stack,er0 mov.l @sp,er1 ; Save the pre-exception sp in the register image mov.l sp,@-er0 ! mov.l er1,@-er0 ; Actually switch the stack mov.l er0,sp *************** *** 115,122 **** ; need to restore the exception frame. mov.l @sp+,er0 mov.l @sp+,er1 ! mov.l er1,@er0 ! mov.l er0,sp // Restore the frame-adjusted SP ; Restore the scratch registers mov.l @er0_save,er0 --- 114,121 ---- ; need to restore the exception frame. mov.l @sp+,er0 mov.l @sp+,er1 ! mov.l er0,@er1 ! mov.l er1,sp // Restore the frame-adjusted SP ; Restore the scratch registers mov.l @er0_save,er0 *************** *** 200,206 **** __interrupt##no: \ jsr @interrupt_entry ! .section .int_fook_table,"a" .space 7*4 __interrupt_table: INTERRUPT_ENTRY(7) --- 199,205 ---- __interrupt##no: \ jsr @interrupt_entry ! .section .int_hook_table,"a" .space 7*4 __interrupt_table: INTERRUPT_ENTRY(7) *************** *** 271,277 **** ; set up stack mov.l #__interrupt_stack,sp - ldc #0x80,ccr ; Initialize hardware hal_cpu_init --- 270,275 ---- *************** *** 299,315 **** #endif ; Setup Interrupt Vector (virtual) ! mov.l #CYG_LABEL_DEFN(__rom_int_fook_start),er5 ! mov.l #CYG_LABEL_DEFN(__int_fook_start),er6 ! mov.l #CYG_LABEL_DEFN(__int_fook_end),er4 sub.l er6,er4 1: eepmov.w dec.w #1,e4 cmp.w #-1,e4 bhi 1b ! ; Clear BSS mov.l #CYG_LABEL_DEFN(__bss_start),er5 mov.l er5,er6 --- 297,315 ---- #endif + #if defined(CYGSEM_HAL_H8300_VECTOR_HOOK) ; Setup Interrupt Vector (virtual) ! mov.l #CYG_LABEL_DEFN(__rom_int_hook_start),er5 ! mov.l #CYG_LABEL_DEFN(__int_hook_start),er6 ! mov.l #CYG_LABEL_DEFN(__int_hook_end),er4 sub.l er6,er4 1: eepmov.w dec.w #1,e4 cmp.w #-1,e4 bhi 1b ! #endif ! ; Clear BSS mov.l #CYG_LABEL_DEFN(__bss_start),er5 mov.l er5,er6 *************** *** 368,374 **** sub.l #__interrupt_table,er0 shlr.l er0 shlr.l er0 ! add.w #7,r0 mov.l er0,@CYG_LABEL_DEFN(_intvector) mov.l @sp+,er0 adds #4,sp --- 368,374 ---- sub.l #__interrupt_table,er0 shlr.l er0 shlr.l er0 ! add.w #7-1,r0 mov.l er0,@CYG_LABEL_DEFN(_intvector) mov.l @sp+,er0 adds #4,sp *************** *** 376,381 **** --- 376,385 ---- hal_cygmon_switch_app_stack #endif hal_cpu_save_all ; push all registers + #ifdef CYGPKG_CYGMON + mov.l @(4*9,sp),er0 + mov.l er0,@(4*7,sp) + #endif mov.l @CYG_LABEL_DEFN(_intvector),er0 shll.l er0 shll.l er0 *************** *** 421,427 **** #if defined(CYGPKG_CYGMON) // For Cygmon, we saved this back when we originally switched stacks. ! mov.l @sp,er1 ; A2 = saved thread state #elif defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK) ; Increment interrupt nesting counter mov.l sp,er1 --- 425,431 ---- #if defined(CYGPKG_CYGMON) // For Cygmon, we saved this back when we originally switched stacks. ! mov.l sp,er1 ; A2 = saved thread state #elif defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK) ; Increment interrupt nesting counter mov.l sp,er1 *************** *** 434,444 **** mov.l er0,sp ; switch to new SP 8: mov.l er1,@-sp ; save old SP - mov.l @er1,er1 #else ! mov @sp,er1 ; A2 = saved thread state #endif ; Here D3 contains the table byte offset of the vector to ; call. --- 438,448 ---- mov.l er0,sp ; switch to new SP 8: mov.l er1,@-sp ; save old SP #else ! mov sp,er1 ; A2 = saved thread state #endif + mov.l er1,er4 ; Here D3 contains the table byte offset of the vector to ; call. *************** *** 448,454 **** ; Call cyg_instrument to record that this interrupt is being raised. .extern CYG_LABEL_DEFN(cyg_instrument) - mov.l er1,er3 mov.l #0x0301,er0 ; type = INTR,RAISE mov.l @CYG_LABEL_DEFN(_intvector),er2 ; arg2 = table offset jsr CYG_LABEL_DEFN(cyg_instrument) ; call instrumentation --- 452,457 ---- *************** *** 475,481 **** ; this is a ^C. .extern CYG_LABEL_DEFN(hal_saved_interrupt_state) ! mov.l er3,@CYG_LABEL_DEFN(hal_saved_interrupt_state) #endif mov.l @CYG_LABEL_DEFN(_intvector),er0 --- 478,484 ---- ; this is a ^C. .extern CYG_LABEL_DEFN(hal_saved_interrupt_state) ! mov.l er4,@CYG_LABEL_DEFN(hal_saved_interrupt_state) #endif mov.l @CYG_LABEL_DEFN(_intvector),er0 *************** *** 589,606 **** .long 0 er1_save: .long 0 - er2_save: - .long 0 - er3_save: - .long 0 - er4_save: - .long 0 - er5_save: - .long 0 - er6_save: - .long 0 - sp_save: - .long 0 #endif ##----------------------------------------------------------------------------- --- 592,597 ---- *************** *** 614,619 **** --- 605,613 ---- hal_diag_excpt_start #endif + mov.l @(32,sp),er0 + subs #2,er0 + mov.l er0,@(32,sp) mov.l sp,er0 mov.l @CYG_LABEL_DEFN(_intvector),er1 *************** *** 687,712 **** .section .bss ! .balign 16 .global _cyg_interrupt_stack_base _cyg_interrupt_stack_base: __interrupt_stack_base: .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE .byte 0 .endr ! .balign 16 .global _cyg_interrupt_stack _cyg_interrupt_stack: __interrupt_stack: #ifdef CYGPKG_CYGMON ! .balign 16 .global __cygmon_interrupt_stack_base __cygmon_interrupt_stack_base: .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE .byte 0 .endr ! .balign 16 .global __cygmon_interrupt_stack __cygmon_interrupt_stack: #endif --- 681,706 ---- .section .bss ! .balign 2 .global _cyg_interrupt_stack_base _cyg_interrupt_stack_base: __interrupt_stack_base: .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE .byte 0 .endr ! .balign 2 .global _cyg_interrupt_stack _cyg_interrupt_stack: __interrupt_stack: #ifdef CYGPKG_CYGMON ! .balign 2 .global __cygmon_interrupt_stack_base __cygmon_interrupt_stack_base: .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE .byte 0 .endr ! .balign 2 .global __cygmon_interrupt_stack __cygmon_interrupt_stack: #endif diff -Nrc ecos/packages/hal/h8300/h8300h/current/cdl/hal_h8300_h8300h.cdl ecos.ysato/packages/hal/h8300/h8300h/current/cdl/hal_h8300_h8300h.cdl *** ecos/packages/hal/h8300/h8300h/current/cdl/hal_h8300_h8300h.cdl Sun Jun 2 01:57:07 2002 --- ecos.ysato/packages/hal/h8300/h8300h/current/cdl/hal_h8300_h8300h.cdl Sun Jun 2 00:26:33 2002 *************** 49 # ==================================================================== ######DESCRIPTIONBEGIN#### # ! # Author(s): jskov # Original data: nickg ! # Contributors: dmoseley ! # Date: 1999-11-02 # #####DESCRIPTIONEND#### # --- 40,49 ---- # ==================================================================== ######DESCRIPTIONBEGIN#### # ! # Author(s): ysato # Original data: nickg ! # Contributors: ysato ! # Date: 2002-02-20 # #####DESCRIPTIONEND#### # diff -Nrc ecos/packages/hal/h8300/h8300h/current/include/mod_regs_wdt.h ecos.ysato/packages/hal/h8300/h8300h/current/include/mod_regs_wdt.h *** ecos/packages/hal/h8300/h8300h/current/include/mod_regs_wdt.h Thu Jan 1 09:00:00 1970 --- ecos.ysato/packages/hal/h8300/h8300h/current/include/mod_regs_wdt.h Sun Jun 2 20:34:04 2002 *************** *** 0 **** --- 1,73 ---- + #ifndef CYGONCE_MOD_REGS_WDT_H + #define CYGONCE_MOD_REGS_WDT_H + + //========================================================================== + // + // mod_regs_wdt.h + // + // Watchdog Timer Register + // + //========================================================================== + //####ECOSGPLCOPYRIGHTBEGIN#### + // ------------------------------------------- + // This file is part of eCos, the Embedded Configurable Operating System. + // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. + // + // eCos is free software; you can redistribute it and/or modify it under + // the terms of the GNU General Public License as published by the Free + // Software Foundation; either version 2 or (at your option) any later version. + // + // eCos is distributed in the hope that it will be useful, but WITHOUT ANY + // WARRANTY; without even the implied warranty of MERCHANTABILITY or + // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + // for more details. + // + // You should have received a copy of the GNU General Public License along + // with eCos; if not, write to the Free Software Foundation, Inc., + // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. + // + // As a special exception, if other files instantiate templates or use macros + // or inline functions from this file, or you compile this file and link it + // with other works to produce a work based on this file, this file does not + // by itself cause the resulting work to be covered by the GNU General Public + // License. However the source code for this file must still be made available + // in accordance with section (3) of the GNU General Public License. + // + // This exception does not invalidate any other reasons why a work based on + // this file might be covered by the GNU General Public License. + // + // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. + // at http://sources.redhat.com/ecos/ecos-license/ + // ------------------------------------------- + //####ECOSGPLCOPYRIGHTEND#### + //========================================================================== + //#####DESCRIPTIONBEGIN#### + // + // Author(s): yoshinori sato + // Contributors: yoshinori sato + // Date: 2002-02-19 + // + //####DESCRIPTIONEND#### + // + //========================================================================== + + #define CYGARC_TCSR 0xFFFF8C + #define CYGARC_TCNT 0xFFFF8D + #define CYGARC_RSTCSRW 0xFFFF8E + #define CYGARC_RSTCSRR 0xFFFF8F + + #define CYGARC_TCNT_MAGIC 0x5A00 + #define CYGARC_TCSR_MAGIC 0xA500 + + #define CYGARC_WDT_OVF 0x80 + #define CYGARC_WDT_WT 0x40 + #define CYGARC_WDT_TME 0x20 + #define CYGARC_WDT_CKS2 0x04 + #define CYGARC_WDT_CKS1 0x02 + #define CYGARC_WDT_CKS0 0x01 + + #define CYGARC_WDT_CKS 0x07 //Max Delay + + #define CYGARC_WDT_PERIOD ((1000000000/(CYGHWR_HAL_H8300_PROCESSOR_SPEED/4096))*256) + + #endif diff -Nrc ecos/packages/hal/h8300/h8300h/current/include/var_arch.h ecos.ysato/packages/hal/h8300/h8300h/current/include/var_arch.h *** ecos/packages/hal/h8300/h8300h/current/include/var_arch.h Sun Jun 2 01:57:07 2002 --- ecos.ysato/packages/hal/h8300/h8300h/current/include/var_arch.h Sun Jun 2 00:26:33 2002 *************** *** 65,86 **** { // These are common to all saved states and are in the order // stored and loaded by the movm instruction. ! CYG_ADDRWORD er0; ! CYG_ADDRWORD er1; ! CYG_ADDRWORD er2; ! CYG_ADDRWORD er3; ! CYG_ADDRWORD er4; ! CYG_ADDRWORD er5; ! CYG_ADDRWORD er6; /* On interrupts the PC and PSW are pushed automatically by the */ /* CPU and SP is pushed for debugging reasons. On a thread switch */ /* the saved context is made to look the same. */ ! CYG_ADDRWORD sp; /* Saved copy of SP in some states */ ! CYG_WORD32 ccr; ! CYG_ADDRWORD pc; /* Program Counter */ ! } HAL_SavedRegisters; // Internal peripheral registers --- 65,84 ---- { // These are common to all saved states and are in the order // stored and loaded by the movm instruction. ! CYG_ADDRWORD er0 __attribute__((aligned(4))); ! CYG_ADDRWORD er1 __attribute__((aligned(4))); ! CYG_ADDRWORD er2 __attribute__((aligned(4))); ! CYG_ADDRWORD er3 __attribute__((aligned(4))); ! CYG_ADDRWORD er4 __attribute__((aligned(4))); ! CYG_ADDRWORD er5 __attribute__((aligned(4))); ! CYG_ADDRWORD er6 __attribute__((aligned(4))); /* On interrupts the PC and PSW are pushed automatically by the */ /* CPU and SP is pushed for debugging reasons. On a thread switch */ /* the saved context is made to look the same. */ ! CYG_ADDRWORD sp __attribute__((aligned(4))); /* Saved copy of SP in some states */ ! CYG_WORD32 pc __attribute__((aligned(4))); } HAL_SavedRegisters; // Internal peripheral registers diff -Nrc ecos/packages/hal/h8300/h8300h/current/include/variant.inc ecos.ysato/packages/hal/h8300/h8300h/current/include/variant.inc *** ecos/packages/hal/h8300/h8300h/current/include/variant.inc Sun Jun 2 01:57:07 2002 --- ecos.ysato/packages/hal/h8300/h8300h/current/include/variant.inc Sun Jun 2 00:26:33 2002 *************** *** 71,79 **** # CPU state save and restore macros .macro hal_cpu_save_all ! stc ccr,@-sp ! subs #2,sp ! subs #4,sp mov.l er6,@-sp # push all registers mov.l er5,@-sp mov.l er4,@-sp --- 71,77 ---- # CPU state save and restore macros .macro hal_cpu_save_all ! mov.l sp,@-sp mov.l er6,@-sp # push all registers mov.l er5,@-sp mov.l er4,@-sp *************** *** 92,104 **** mov.l @sp+,er5 mov.l @sp+,er6 adds #4,sp - adds #2,sp - ldc @sp+,ccr .endm # Location of PC in saved register context (HAL_SavedRegisters) ! #define SAVED_CONTEXT_PC_OFFSET 36 ##----------------------------------------------------------------------------- # Default interrupt decoding macros. --- 90,100 ---- mov.l @sp+,er5 mov.l @sp+,er6 adds #4,sp .endm # Location of PC in saved register context (HAL_SavedRegisters) ! #define SAVED_CONTEXT_PC_OFFSET (4*8) ##----------------------------------------------------------------------------- # Default interrupt decoding macros. diff -Nrc ecos/packages/hal/h8300/h8300h/current/src/h8300_h8300h.ld ecos.ysato/packages/hal/h8300/h8300h/current/src/h8300_h8300h.ld *** ecos/packages/hal/h8300/h8300h/current/src/h8300_h8300h.ld Sun Jun 2 01:57:07 2002 --- ecos.ysato/packages/hal/h8300/h8300h/current/src/h8300_h8300h.ld Sun Jun 2 00:26:33 2002 *************** *** 92,104 **** { FORCE_OUTPUT; *(.gcc_except_table) } \ > _region_ ! #define SECTION_int_fook_table(_region_, _vma_, _lma_) \ ! .int_fook_table _vma_ : _lma_ \ ! { CYG_LABEL_DEFN(__int_fook_start) = ABSOLUTE (.); \ ! FORCE_OUTPUT; *(.int_fook_table) } \ > _region_ \ ! CYG_LABEL_DEFN(__rom_int_fook_start) = LOADADDR (.int_fook_table); \ ! CYG_LABEL_DEFN(__int_fook_end) = .; #define SECTION_data(_region_, _vma_, _lma_) \ .data _vma_ : _lma_ \ --- 92,104 ---- { FORCE_OUTPUT; *(.gcc_except_table) } \ > _region_ ! #define SECTION_int_hook_table(_region_, _vma_, _lma_) \ ! .int_hook_table _vma_ : _lma_ \ ! { CYG_LABEL_DEFN(__int_hook_start) = ABSOLUTE (.); \ ! FORCE_OUTPUT; *(.int_hook_table) } \ > _region_ \ ! CYG_LABEL_DEFN(__rom_int_hook_start) = LOADADDR (.int_hook_table); \ ! CYG_LABEL_DEFN(__int_hook_end) = .; #define SECTION_data(_region_, _vma_, _lma_) \ .data _vma_ : _lma_ \ diff -Nrc ecos/packages/hal/h8300/h8300h/current/src/h8_sci.c ecos.ysato/packages/hal/h8300/h8300h/current/src/h8_sci.c *** ecos/packages/hal/h8300/h8300h/current/src/h8_sci.c Sun Jun 2 01:57:08 2002 --- ecos.ysato/packages/hal/h8300/h8300h/current/src/h8_sci.c Sun Jun 2 00:26:33 2002 *************** *** 98,104 **** if (sr & CYGARC_REG_SCSSR_ORER) { // Serial RX overrun. Clear error and let caller try again. HAL_WRITE_UINT8(base+_REG_SCSSR, ! CYGARC_REG_SCSSR_CLEARMASK & ~CYGARC_REG_SCSSR_ORER); return false; } --- 98,104 ---- if (sr & CYGARC_REG_SCSSR_ORER) { // Serial RX overrun. Clear error and let caller try again. HAL_WRITE_UINT8(base+_REG_SCSSR, ! sr & ~CYGARC_REG_SCSSR_ORER); return false; } *************** *** 257,263 **** if (sr & CYGARC_REG_SCSSR_ORER) { // Serial RX overrun. Clear error and hope protocol recovers. HAL_WRITE_UINT8(base+_REG_SCSSR, ! CYGARC_REG_SCSSR_CLEARMASK & ~CYGARC_REG_SCSSR_ORER); res = CYG_ISR_HANDLED; } else if (sr & CYGARC_REG_SCSSR_RDRF) { // Received character --- 257,263 ---- if (sr & CYGARC_REG_SCSSR_ORER) { // Serial RX overrun. Clear error and hope protocol recovers. HAL_WRITE_UINT8(base+_REG_SCSSR, ! sr & ~CYGARC_REG_SCSSR_ORER); res = CYG_ISR_HANDLED; } else if (sr & CYGARC_REG_SCSSR_RDRF) { // Received character *************** *** 265,271 **** // Clear buffer full flag. HAL_WRITE_UINT8(base+_REG_SCSSR, ! CYGARC_REG_SCSSR_CLEARMASK & ~CYGARC_REG_SCSSR_RDRF); if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; --- 265,271 ---- // Clear buffer full flag. HAL_WRITE_UINT8(base+_REG_SCSSR, ! sr & ~CYGARC_REG_SCSSR_RDRF); if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; diff -Nrc ecos/packages/hal/h8300/h8300h/current/src/var_misc.c ecos.ysato/packages/hal/h8300/h8300h/current/src/var_misc.c *** ecos/packages/hal/h8300/h8300h/current/src/var_misc.c Sun Jun 2 01:57:08 2002 --- ecos.ysato/packages/hal/h8300/h8300h/current/src/var_misc.c Sun Jun 2 00:26:33 2002 *************** *** 77,83 ***** #define REGS_DEF(ier,isr,mask,status) \ {(CYG_BYTE *)ier,(CYG_BYTE *)isr,mask,status} ! struct int_regs interrupt_registers[]= { REGS_DEF(CYGARC_IER,CYGARC_ISR,0x01,0x01), REGS_DEF(CYGARC_IER,CYGARC_ISR,0x02,0x02), REGS_DEF(CYGARC_IER,CYGARC_ISR,0x04,0x04), --- 77,83 ---- #define REGS_DEF(ier,isr,mask,status) \ {(CYG_BYTE *)ier,(CYG_BYTE *)isr,mask,status} ! const struct int_regs interrupt_registers[]= { REGS_DEF(CYGARC_IER,CYGARC_ISR,0x01,0x01), REGS_DEF(CYGARC_IER,CYGARC_ISR,0x02,0x02), REGS_DEF(CYGARC_IER,CYGARC_ISR,0x04,0x04), diff -Nrc ecos/packages/hal/h8300/sim/current/include/pkgconf/mlt_h8300_h8300h_sim_ram.ldi ecos.ysato/packages/hal/h8300/sim/current/include/pkgconf/mlt_h8300_h8300h_sim_ram.ldi *** ecos/packages/hal/h8300/sim/current/include/pkgconf/mlt_h8300_h8300h_sim_ram.ldi Tue May 21 07:22:40 2002 --- ecos.ysato/packages/hal/h8300/sim/current/include/pkgconf/mlt_h8300_h8300h_sim_ram.ldi Sun Jun 2 00:26:33 2002 *************** *** 22,28 **** SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) ! SECTION_int_fook_table (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA) SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); --- 22,28 ---- SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) ! SECTION_int_hook_table (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA) SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); diff -Nrc ecos/packages/hal/h8300/sim/current/src/hal_diag.c ecos.ysato/packages/hal/h8300/sim/current/src/hal_diag.c *** ecos/packages/hal/h8300/sim/current/src/hal_diag.c Sun Jun 2 01:57:08 2002 --- ecos.ysato/packages/hal/h8300/sim/current/src/hal_diag.c Sun Jun 2 00:26:33 2002 *************** *** 90,95 **** --- 90,109 ---- *c = (char) cyg_hal_plf_sci_getc(&channel); } + //============================================================================= + // Led control + //============================================================================= + + void + hal_diag_led_on( void ) + { + } + + void + hal_diag_led_off( void ) + { + } + /*===========================================================================*/ /* EOF hal_diag.c */ diff -Nrc ecos/packages/infra/current/src/diag.cxx ecos.ysato/packages/infra/current/src/diag.cxx *** ecos/packages/infra/current/src/diag.cxx Sun Jun 2 01:57:41 2002 --- ecos.ysato/packages/infra/current/src/diag.cxx Sun Jun 2 00:26:33 2002 *************** *** 78,83 **** --- 78,86 ---- ); class Cyg_dummy_diag_init_class { + #if defined(__H8300H__) + cyg_uint16 dummy; + #endif public: Cyg_dummy_diag_init_class() { HAL_DIAG_INIT();